Verilator
A tool which converts Verilog to a cycle-accurate behavioral model in C++ or SystemC. Performs lint code-quality checks.
- from
- Static Analysis & Code Quality, Open Hardware
- added
- 2026-10-10
- likes
- 0
Static Analysis & Code Quality › Programming Languages: “A tool which converts Verilog to a cycle-accurate behavioral model in C++ or SystemC. Performs lint code-quality checks.”
Open Hardware › Design Tools > Integrated Circuit: “A program for simulating HDL code.”